DanB
|
49696b89dd
|
SMAsterisk send init to SMGeneric and process answer
|
2016-09-14 20:27:22 +02:00 |
|
DanB
|
401625861d
|
Updated project README, COPYRIGHT information
|
2016-09-02 13:04:34 +02:00 |
|
DanB
|
f7edd20174
|
Cache redesign, fixing transactions mechanism
|
2016-08-31 11:43:33 +02:00 |
|
DanB
|
a24003ff20
|
Fix import issue
|
2016-08-30 13:49:59 +02:00 |
|
DanB
|
17651acf8c
|
Simplified locking for lrustore
|
2016-08-30 13:13:26 +02:00 |
|
DanB
|
7bd3a430d2
|
Fix return at LRUStore, SMGeneric to properly check EXISTS error
|
2016-08-30 09:59:09 +02:00 |
|
DanB
|
0829f33243
|
LRUStore protection for concurrent access
|
2016-08-29 16:55:43 +02:00 |
|
DanB
|
20255ce39a
|
cacheDoubleStore for concurrent access
|
2016-08-29 16:10:04 +02:00 |
|
Radu Ioan Fericean
|
87e12f6ea4
|
use configs for cache lib
|
2016-08-19 14:06:37 +03:00 |
|
Radu Ioan Fericean
|
c939a49af3
|
using esternal library for cache
|
2016-08-18 20:17:51 +03:00 |
|
Radu Ioan Fericean
|
4dd445eb9e
|
small fix
|
2016-08-16 18:18:51 +03:00 |
|
Radu Ioan Fericean
|
a7f3ae99c4
|
implemented get keys for prefix
|
2016-08-16 18:11:38 +03:00 |
|
Radu Ioan Fericean
|
33f6aa7cd4
|
no ttl by default
|
2016-08-16 15:31:20 +03:00 |
|
Radu Ioan Fericean
|
747af43f8d
|
initialize cache with config object
|
2016-08-15 23:05:55 +03:00 |
|
Radu Ioan Fericean
|
b89725be46
|
hardcoded values for cache
|
2016-08-15 11:12:15 +03:00 |
|
Radu Ioan Fericean
|
a10f0aaaa9
|
refernce db test ok
|
2016-08-10 20:02:28 +03:00 |
|
Radu Ioan Fericean
|
447974dd7c
|
moved cache files back in separate package
|
2016-08-05 19:42:35 +03:00 |
|